Cypress Semiconductor FX2LP Technické informace stáhnout pdf (Strana 426)

100

101

EZ-USB FX2 Technical Reference Manual

Page 15-106 EZ-USB FX2 Technical Reference Manual v2.1

The minimum delay length is a function of the IFCLK and CLKOUT (CPU Clock) frequencies, and

is determined by the equation:

The required delay length is smallest when the CPU is running at its slowest speed (12 MHz, 83.2

ns/cycle) and IFCLK is running at its fastest speed (48 MHz, 20.8 ns/cycle). Under those condi-

tions, the minimum required delay is:

The longest delay is required when the CPU is running at its fastest speed (48MHz, 20.8 ns/cycle)

and IFCLK is running much slower (e.g., 5.2 MHz, 192 ns/cycle):

The most-typical FX2 configuration, IFCLK and CLKOUT both running at 48 MHz, requires a mini-

mum delay of:

The Frameworks fimware supplied with the EZ-USB FX2 Development Kit includes a macro,

called SYNCDELAY, which implements the synchronization delay. The macro is in the file

fx2sdly.h.

Minimum Sync Delay, in CPU cycles 1.5

IFCLK Period

CLKOUT Period

-----------------------------------------





×=

Note:

n means “round n upward”

1.5

20.8

83.2

----------





× 1.5 1.25()× 1.875 2 CPU Cycles===

1.5

192

20.8

----------





× 1.5 10.23()× 15.3 16 CPU Cycles===

1.5

20.8

----------





× 1.5 2()× 3 3 CPU Cycles===

1 2 ... 421 422 423 424 425 426 427 428 429 430 431 ... 459 460

Komentáře k této Příručce

Žádné komentáře

Cypress Semiconductor FX2LP Technické informace Strana 426

Komentáře k této Příručce

Související produkty a manuály pro Sítě Cypress Semiconductor FX2LP