Cypress Semiconductor FX2LP Technické informace stáhnout pdf (Strana 232)

EZ-USB FX2 Technical Reference Manual

Page 10-42 EZ-USB FX2 Technical Reference Manual v2.1

Each time through the Idle State, the GPIF will decrement the Transaction Count; when it expires,

the waveform terminates and the DONE bit is set.

Otherwise, the GPIF re-executes the entire Waveform Descriptor. In Long Transfer Mode, the

DONE bit isn’t set until the Transaction Count expires.

While the Transaction Count is active, the GPIF checks the Full Flag (for IN FIFOs) or the Empty

Flag (for OUT FIFOs) on every pass through the Idle State. If the flag is asserted, the GPIF

pauses until the over/underflow threat is removed, then it automatically resumes. In this way, the

GPIF automatically throttles data flow in Long Transfer Mode.

The GPIFTCB3:0 registers are readable and they update as transactions occur, so the CPU can

read the Transaction Count value at any time.

10.4.3.2 Reading the Transaction-Count Status in a DP State

To sample the transaction-count status in a DP State, set GPIFREADYCFG.5 to 1 (which instructs

the FX2 to replace the RDY5 input with the transaction-count status), then launch a FIFO transac-

tion which uses a transaction count. The FX2 will set RDY5 to 1 when the transaction count

expires.

Typically, this feature is used with “re-execute” control tasks; it allows the Transaction Counter to

be used without passing through the Idle State after each transaction.

10.4.4 GPIF Flag Selection

The GPIF can examine the PF, EF, or FF (of the current FIFO) during a waveform. One of the

three flags is selected by the FS[1:0] bits in the EPxGPIFFLGSEL register; that selected flag is

called the GPIF Flag.

10.4.5 GPIF Flag Stop

When EPxGPIFPFSTOP.0 is set to 1, FIFO-Read and -Write transactions are terminated by the

assertion of the GPIF Flag. When this feature is used, it overrides the Transaction Counter; the

GPIF waveform terminates (sets DONE to 1) only when the GPIF Flag asserts.

No special programming of the Waveform Descriptors is necessary, and FIFO Waveform Descrip-

tors that transition through the Idle State on each transaction (i.e., waveforms that don’t use the

Transaction Counter) are unaffected. Automatic throttling of the FIFOs in IDLE still occurs, so

there’s no danger that the GPIF will write to a full FIFO or read from an empty FIFO.

Unless the firmware aborts the GPIF transfer by writing to the GPIFABORT register,

only

the GPIF

Flag assertion will terminate the waveform and set the DONE bit.

A waveform can potentially execute forever if the GPIF Flag never asserts.

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Cypress Semiconductor FX2LP Technické informace Strana 232