Cypress Semiconductor FX2LP Technické informace stáhnout pdf (Strana 40)

EZ-USB FX2 Technical Reference Manual

Page 1-14 EZ-USB FX2 Technical Reference Manual v2.1

the firmware associated with the USB protocol is simplified, leaving code space and bandwidth

available for the CPU’s primary duty—to help implement your device. On the device side, abun-

dant input/output resources are available, including I/O ports, USARTs, and an I²C-compatible

bus master controller. These resources are described in Chapter 13, "Input/Output", and Chapter

14, "Timers/Counters and Serial Interface".

It’s important to recognize that the FX2 architecture is such that the CPU sets up and controls data

transfers, but it normally does not participate in high bandwidth transfers. It is not in the data path;

instead, the large data FIFOs that handle endpoint data connect directly to outside interfaces. To

make the interface versatile, a programmable timing generator (GPIF, General Programmable

Interface) can create user-programmed waveforms for high bandwidth transfers between the inter-

nal FIFOs and external logic.

FX2 adds eight interrupt sources to the standard 8051 interrupt system:

• INT2: USB Interrupt

• INT3: I²C-Compatible Bus Interrupt

• INT4: FIFO/GPIF Interrupt

• INT4: External Interrupt 4

• INT5: External Interrupt 5

• INT6: External Interrupt 6

• USART1: USART1 Interrupt

• WAKEUP: USB Resume Interrupt

The FX2 provides 27 individual USB-interrupt sources which share the INT2 interrupt, and 14 indi-

vidual FIFO/GPIF-interrupt sources which share the INT4 interrupt. To save the code and process-

ing time which normally would be required to identify an individual interrupt source, the FX2

provides a second level of interrupt vectoring called

Autovectoring

. Each INT2 and INT4 interrupt

source has its own autovector, so when an interrupt requires service, the proper ISR (interrupt ser-

vice routine) is automatically invoked.

Chapter 4, "Interrupts"

describes the FX2 interrupt system.

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