Cypress Semiconductor FX2LP Technické informace stáhnout pdf (Strana 14)

xiv List of Figures

(List of Figures)

Figure 6-2. USB Suspend sequence ..................................................................................................6-3

Figure 6-3. FX2 Wakeup/Resume sequence .....................................................................................6-4

Figure 6-4. USB Control and Status register ......................................................................................6-6

Figure 7-1. EZ-USB FX2 Resets ........................................................................................................7-1

Figure 9-1. Slave FIFOs’ Role in the FX2 System .............................................................................9-2

Figure 9-2. FX2 Slave Mode Full-Featured Interface Pins .................................................................9-3

Figure 9-3. Asynchronous vs. Synchronous Timing Models ..............................................................9-3

Figure 9-4. 8-bit Mode Slave FIFOs, WORDWIDE=0 ........................................................................9-4

Figure 9-5. 16-bit Mode Slave FIFOs, WORDWIDE=1 ......................................................................9-5

Figure 9-6. IFCLK Configuration ........................................................................................................9-6

Figure 9-7. Satisfying Setup Timing by Inverting the IFCLK Output ...................................................9-6

Figure 9-8. FLAGx ..............................................................................................................................9-7

Figure 9-9. Slave FIFO Control Pins ..................................................................................................9-9

Figure 9-10. Interface Pins Example: Synchronous FIFO Writes .......................................................9-10

Figure 9-11. State Machine Example: Synchronous FIFO Writes ......................................................9-11

Figure 9-12. Timing Example: Synchronous FIFO Writes, Waveform 1 .............................................9-11

Figure 9-13. Timing Example: Synchronous FIFO Writes, Waveform 2 .............................................9-12

Figure 9-14. Timing Example: Synchronous FIFO Writes, Waveform 3, PKTEND Pin Illustrated .....9-12

Figure 9-15. Interface Pins Example: Synchronous FIFO Reads .......................................................9-13

Figure 9-16. State Machine Example: Synchronous FIFO Reads ......................................................9-13

Figure 9-17. Timing Example: Synchronous FIFO Reads, Waveform 1 ............................................9-14

Figure 9-18. Timing Example: Synchronous FIFO Reads, Waveform 2, EMPTY Flag Illustrated .....9-14

Figure 9-19. Interface Pins Example: Asynchronous FIFO Writes .....................................................9-15

Figure 9-20. State Machine Example: Asynchronous FIFO Writes ....................................................9-15

Figure 9-21. Timing Example: Asynchronous FIFO Writes ................................................................9-16

Figure 9-22. Interface Pins Example: Asynchronous FIFO Reads .....................................................9-17

Figure 9-23. State Machine Example: Asynchronous FIFO Reads ....................................................9-17

Figure 9-24. Timing Example: Asynchronous FIFO Reads ................................................................9-18

Figure 9-25. EPxFIFOBUF Registers .................................................................................................9-20

Figure 9-26. EPx Memories ................................................................................................................9-21

Figure 9-27. When AUTOOUT=1, OUT Packets are Automatically Committed .................................9-22

Figure 9-28. TD_Init Example: Configuring AUTOOUT = 1 ...............................................................9-22

Figure 9-29. TD_Init Example: Configuring AUTOIN = 1 ...................................................................9-23

Figure 9-30. TD_Poll Example: No Code Necessary for OUT Packets When AUTOOUT=1 ............9-23

Figure 9-31. TD_Init Example, Configuring AUTOOUT=0 .................................................................9-24

Figure 9-32. Skip, Commit, or Source (AUTOOUT=0) .......................................................................9-25

Figure 9-33. TD_Poll Example, AUTOOUT=0, Commit Packet .........................................................9-25

Figure 9-34. TD_Poll Example, AUTOOUT=0, Skip Packet ...............................................................9-25

Figure 9-35. TD_Poll Example, AUTOOUT=0, Source ......................................................................9-26

Figure 9-36. TD_Init Example, OUT Endpoint Initialization ................................................................9-27

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 459 460

Žádné komentáře

Cypress Semiconductor FX2LP Technické informace Strana 14