Cypress Semiconductor Quad HOTLink II CYV15G0404RB Uživatelská příručka stáhnout pdf (Strana 83)

Quad Independent Channel

HOTLink II™ CYV15G0404DXB

Video PHY Demonstration Board

Page 83 of 92

• The GUI looks like the following.

Board Configuration Instructions

Please note that the FPGAs and PSoC are preprogrammed at the factory, for testing purposes. Therefore, you should have no

need to perform the following steps. They are included as a reference should you ever need to reprogram the board.

1. Double click on the HDVB icon. The GUI should appear.

2. Click on Tools ->FPGA Programming. A small dialog box should pop up as shown.

Click on FPGA1 (U2). This will bring up a File Open dialog box. Select “Hdvb0.pof”. Click on “Open”. The dialog box will have a

“percentage complete” indicator which indicates if the erasing/programming is completed. The FPGA will first be erased, then

programmed. When “Programming U2 Complete” is indicated on top of the “percentage complete” bar, click on “Exit” to close the

dialog box. The FPGA 1 (U2) is now configured. The series of status indications of the dialog box is shown in the following figures.

Figure E-15. HVDB Graphical User Interface

Figure E-16. GUI–FPGA Programming Dialog Box

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Cypress Semiconductor Quad HOTLink II CYV15G0404RB Uživatelská příručka Strana 83