Cypress Semiconductor Perform STK14D88 Uživatelský manuál Strana 7

  • Stažení
  • Přidat do mých příruček
  • Tisk
  • Strana
    / 19
  • Tabulka s obsahem
  • KNIHY
  • Hodnocené. / 5. Na základě hodnocení zákazníků
Zobrazit stránku 6
CY14B256L
Document Number: 001-06422 Rev. *I Page 7 of 19
Table 1. Hardware Mode Selection
CE WE OE
A
14
– A
0
Mode I/O Power
H X X X Not Selected Output High Z Standby
L H L X Read SRAM Output Data Active
L L X X Write SRAM Input Data Active
LHL0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x03F8
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore Disable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
[1, 2, 3]
LHL0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x07F0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore Enable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Active
[1, 2, 3]
LHL0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0FC0
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Store
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active I
CC2
[1, 2, 3]
LHL0x0E38
0x31C7
0x03E0
0x3C1F
0x303F
0x0C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile Recall
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
[1, 2, 3]
Notes
1. The six consecutive address locations are in the order listed. WE
is HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 15 address lines on the CY14B256L, only the lower 14 lines are used to control software modes.
3. I/O state depends on the state of OE
. The I/O table shown is based on OE Low.
Not Recommended for New Designs
[+] Feedback [+] Feedback
Zobrazit stránku 6
1 2 3 4 5 6 7 8 9 10 11 12 ... 18 19

Komentáře k této Příručce

Žádné komentáře