Cypress Semiconductor CY7C1364C Uživatelský manuál Strana 18

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CY7C1364C
Document Number: 001-74592 Rev. *B Page 18 of 29
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage Temperature ............................... –65 C to +150 C
Ambient Temperature with
Power Applied ......................................... –55 C to +125 C
Supply Voltage on V
DD
Relative to GND .....–0.5 V to +4.6 V
Supply Voltage on V
DDQ
Relative to GND .... –0.5 V to +V
DD
DC Voltage Applied to Outputs
in tri-state ..........................................–0.5 V to V
DDQ
+ 0.5 V
DC Input Voltage ................................ –0.5 V to V
DD
+ 0.5 V
Current into Outputs (LOW) ........................................ 20 mA
Static Discharge Voltage
(per MIL-STD-883, Method 3015) .......................... >2001 V
Latch-up Current ..................................................... >200 mA
Operating Range
Range
Ambient
Temperature
V
DD
V
DDQ
Industrial –40 °C to +85 °C 3.3 V– 5% /
+ 10%
2.5 V – 5% to
V
DD
Electrical Characteristics
Over the Operating Range
Parameter
[12, 13]
Description Test Conditions Min Max Unit
V
DD
Power Supply Voltage 3.135 3.6 V
V
DDQ
I/O Supply Voltage for 3.3 V I/O 3.135 V
DD
V
for 2.5 V I/O 2.375 2.625 V
V
OH
Output HIGH Voltage for 3.3 V I/O, I
OH
= –4.0 mA 2.4 V
for 2.5 V I/O, I
OH
= –1.0 mA 2.0 V
V
OL
Output LOW Voltage for 3.3 V I/O, I
OL
= 8.0 mA 0.4 V
for 2.5 V I/O, I
OL
= 1.0 mA 0.4 V
V
IH
Input HIGH Voltage
[12]
for 3.3 V I/O 2.0 V
DD
+ 0.3 V V
for 2.5 V I/O 1.7 V
DD
+ 0.3 V V
V
IL
Input LOW Voltage
[12]
for 3.3 V I/O –0.3 0.8 V
for 2.5 V I/O –0.3 0.7
V
I
X
Input Leakage Current except ZZ
and MODE
GND V
I
V
DDQ
–5 5 A
Input Current of MODE Input = V
SS
–30 A
Input = V
DD
5 A
Input Current of ZZ Input = V
SS
–5 A
Input = V
DD
30 A
I
OZ
Output Leakage Current GND V
I
V
DDQ,
Output Disabled –5 5 A
I
DD
V
DD
Operating Supply Current V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
6-ns cycle,
166 MHz
180 mA
I
SB1
Automatic CE Power-down
Current – TTL Inputs
V
DD
= Max., Device Deselected,
V
IN
V
IH
or V
IN
V
IL
,
f = f
MAX
= 1/t
CYC
6-ns cycle,
166 MHz
110 mA
I
SB2
Automatic CE Power-down
Current – CMOS Inputs
V
DD
= Max., Device Deselected,
V
IN
0.3 V or V
IN
> V
DDQ
– 0.3 V,
f = 0
6-ns cycle,
166 MHz
40 mA
Notes
12. Overshoot: V
IH(AC)
< V
DD
+ 1.5 V (Pulse width less than t
CYC
/2), undershoot: V
IL(AC)
> –2 V (Pulse width less than t
CYC
/2).
13. T
Power-up
: Assumes a linear ramp from 0 V to V
DD(min)
within 200 ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
.
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