Cypress Semiconductor CY8C24894 Uživatelský manuál

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CY8C24094, CY8C24794
CY8C24894, CY8C24994
PSoC
®
Programmable System-on-Chip
Cypress Semiconductor Corporation 198 Champion Court San Jose
,
CA 95134-1709 408-943-2600
Document Number: 38-12018 Rev. *Q Revised September 24, 2009
1. Features
XRES Pin to Support In-System Serial Programming (ISSP)
and External Reset Control in CY8C24894
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
Two 8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
3V to 5.25V Operating Voltage
Industrial Temperature Range: -40°C to +85°C
USB Temperature Range: -10°C to +85°C
Advanced Peripherals (PSoC
®
Blocks)
6 Rail-to-Rail Analog PSoC Blocks Provide:
Up to 14-Bit ADCs
Up to 9-Bit DACs
Programmable Gain Amplifiers
Programmable Filters and Comparators
Four Digital PSoC Blocks Provide:
8 to 32-Bit Timers, Counters, and PWMs
CRC and PRS Modules
Full-Duplex UART
Multiple SPI Masters or Slaves
Connectable to all GPI/O Pins
Complex Peripherals by Combining Blocks
Capacitive Sensing Application Capability
Full Speed USB (12 Mbps)
Four Uni-Directional Endpoints
One Bi-Directional Control Endpoint
USB 2.0 Compliant
Dedicated 256 Byte Buffer
No External Crystal Required
Flexible On-Chip Memory
16K Flash Program Storage 50,000 Erase and Write Cycles
1K SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink, 10 mA Source on all GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on all GPI/O
Up to 48 Analog Inputs on GPI/O
Two 33 mA Analog Outputs on GPI/O
Configurable Interrupt on all GPI/O
Precision, Programmable Clocking
Internal ±4% 24 and 48 MHz Oscillator
Internal Oscillator for Watchdog and Sleep
0.25% Accuracy for USB with no External Components
Additional System Resources
I
2
C Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User Configurable Low Voltage Detection
DIGITAL SYSTEM
SRAM
1K
Interrupt
Controller
Sleep and
W atchdog
Clock Sources
(Includes IMO and ILO )
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 16K
Digital
Block
A rray
Digital
Clocks
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref.
Port 5 Port 4 Port 3 Port 2 Port 1 Port 0
Analog
Drivers
Analog
Block
Array
In te rn al
Voltage
Ref.
POR and LVD
System Resets
2
MACs
Decimator
Type 2
I2C USB
Port 7
S
y
s
t
e
m
B
u
s
Analog
Input
Muxing
2. Logic Block Diagram
[+] Feedback
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Shrnutí obsahu

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CY8C24094, CY8C24794CY8C24894, CY8C24994PSoC® Programmable System-on-ChipCypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-17

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 10 of 488.3 68-Pin Part Pinout The following 68-pin QFN part table and

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 11 of 488.4 68-Pin Part Pinout (On-Chip Debug) The following 68-pin QF

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 12 of 488.5 100-Ball VFBGA Part PinoutThe 100-ball VFBGA part is for t

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 13 of 48Figure 8-5. CY8C24094 OCD (Not for Production)8.6 100-Ball VF

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 14 of 48Figure 8-6. CY8C24094 OCD (Not for Production)C8 I/O I,M P2[0]

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 15 of 488.7 100-Pin Part Pinout (On-Chip Debug)The 100-pin TQFP part i

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 16 of 48Figure 8-7. CY8C24094 OCD (Not for Production)TQFPNCNCAI, M, P

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 17 of 489. Register ReferenceThis section lists the registers of the C

Strany 10 - CY8C24894, CY8C24994

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 18 of 489.3 Register Map Bank 0 Table: User Space Name Addr (0,Hex) Ac

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 19 of 489.4 Register Map Bank 1 Table: Configuration Space Name Addr

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 2 of 483. PSoC Functional OverviewThe PSoC family consists of many pro

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 20 of 4810. Electrical SpecificationsThis section presents the DC and

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 21 of 4810.1 Absolute Maximum Ratings10.2 Operating TemperatureTable

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 22 of 4810.3 DC Electrical Characteristics10.3.1 DC Chip Level Specif

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 23 of 4810.3.3 DC Full Speed USB SpecificationsThe following table lis

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 24 of 4810.3.5 DC Low Power Comparator SpecificationsThe following tab

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 25 of 4810.3.6 DC Analog Output Buffer SpecificationsThe following tab

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 26 of 4810.3.7 DC Analog Reference SpecificationsThe following tables

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 27 of 4810.3.8 DC Analog PSoC Block SpecificationsThe following table

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 28 of 4810.3.9 DC POR and LVD SpecificationsThe following table lists

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 29 of 4810.3.10 DC Programming SpecificationsThe following table lists

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 3 of 483.3 The Analog SystemThe Analog System is composed of 6 configu

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 30 of 4810.4 AC Electrical Characteristics10.4.1 AC Chip-Level Specif

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 31 of 4810.4.2 AC General Purpose I/O SpecificationsThe following tabl

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 32 of 4810.4.4 AC Operational Amplifier SpecificationsThe following ta

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 33 of 48When bypassed by a capacitor on P2[4], the noise of the analog

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 34 of 4810.4.5 AC Low Power Comparator SpecificationsThe following tab

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 35 of 4810.4.7 AC External Clock SpecificationsThe following tables li

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 36 of 4810.4.9 AC Programming SpecificationsThe following table lists

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 37 of 4810.4.10 AC I2C SpecificationsThe following table lists guarant

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 38 of 4811. Packaging DimensionsThis section illustrates the package s

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 39 of 48Figure 11-2. 56-Pin QFN (8 X 8 X 0.9 MM) - SawnFigure 11-3. 6

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 4 of 483.4 Additional System ResourcesSystem Resources, provide additi

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 40 of 48Important Note For information on the preferred dimensions for

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 41 of 48Figure 11-5. 100-Ball (6x6 mm) VFBGAFigure 11-6. 100-Pin (14x

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 42 of 4811.1 Thermal Impedance11.2 Solder Reflow Peak TemperatureFoll

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 43 of 4812. Development Tool Selection12.1 Software12.1.1 PSoC Desig

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 44 of 4812.4 Device ProgrammersAll device programmers can be purchased

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 45 of 4813. Ordering Information Note For Die sales information, conta

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 46 of 4813.1 Ordering Code DefinitionsCY Package Type:PX = PDIP Pb-Fre

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 47 of 48Document History PageDocument Title: CY8C24094, CY8C24794, CY8C

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Document Number: 38-12018 Rev. *Q Revised September 24, 2009 Page 48 of 48PSoC Designer™ is a trademark and PSoC® is a registered trademark of Cypress

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 5 of 485. Development ToolsPSoC Designer is a Microsoft® Windows-based

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 6 of 486. Designing with PSoC DesignerThe development process for the

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 7 of 487. Document Conventions7.1 Acronyms UsedThe following table li

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 8 of 488. Pin InformationThis section describes, lists, and illustrate

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CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *Q Page 9 of 488.2 56-Pin Part Pinout (with XRES) Table 8-2. 56-Pin Part Pino

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