Cypress Semiconductor enCoRe CY7C601xx Uživatelská příručka stáhnout pdf (Strana 62)

CY7C601xx

CY7C602xx

Document 38-16016 Rev. *C Page 62 of 62

Document History Page

Document Title: CY7C601/2xx enCoRe™ II Low Voltage Microcontroller

Document Number: 38-16016

Rev. ECN No. Issue Date

Orig. of

Change

Description of Change

** 327601 See ECN BON New data sheet

*A 400134 See ECN BHA Updated Power consumption values

Corrected Pin Assignment Table for 24 QSOP, 24 PDIP and 28 SSOP packages

Minor text changes for clarification purposes

Corrected INT_MSK0 and INT_MSK1 register address

Corrected register bit definitions

Corrected Protection Mode Settings in Table 10-7

Updated LVD Trip Point values

Added Block diagrams for Timer functional timing

Replaced TBD’s with actual values

Added SPI Block Diagram

Added Timing Block Diagrams

Removed CY7C60123 DIE from Figure 5-1

Removed CY7C60123-WXC from Section 22.0 Ordering Information

Updated internal 24 MHz Oscillator accuracy information

Added information on sending/receiving data when using 32 KHz oscillator

*B 505222 See ECN TYJ Minor text changes

GPIO capacitance and timing diagram included

Method to clear Capture Interrupt Status bit discussed

Sleep and Wakeup sequence documented

PIT Timer registers’ R/W capability corrected to read only

Modified Free Running Counter text in section 17.1.1

*C 524104 See ECN KKVTMP Change title from Wireless enCoRe II to enCoRe II Low Voltage

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