Cypress Semiconductor SL811HS Specifikace stáhnout pdf (Strana 24)

SL811HS

Document #: 38-08008 Rev. *A Page 24 of 29

7.6 Bus Interface Timing Requirements

7.6.1 I/O Write Cycle

Note: nCS an be held LOW for multiple Write cycles provided nWR is cycled.

Write Cycle Time for Auto Inc Mode Writes is 150 ns minimum.

Parameter Description Min. Typ. Max.

Write pulse width 65 ns

WCSU

Chip select set-up to nWR LOW 0 ns

WSHLD

Chip select hold time

After nWR HIGH

0 ns

WASU

A0 address set-up time 65 ns

WAHLD

A0 address hold time 10 ns

WDSU

Data to Write HIGH set-up time 60 ns

WDHLD

Data hold time after Write HIGH 5 ns

CSCS

nCS inactive to nCS* asserted 85 ns

WRHIGH

NWR HIGH 85 ns

nWR

D0-D7

DATA

twr

twahld

twdhld

twasu

twdsu

twdhld

I/O Write Cycle to Register or Memory Buffer

Address

nCS

twcsu

twshld

Tcscs See Note.

twrhigh

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Cypress Semiconductor SL811HS Specifikace Strana 24