Cypress Semiconductor SL811HS Specifikace Strana 17

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SL811HS
Document #: 38-08008 Rev. *A Page 17 of 29
6.1.3 SL811HS USB Host Controller Pins Description
The SL811HS package is a 28-pin PLCC. The device requires 3.3 VDC. Average typical current consumption is less then 20 mA
for 3.3V.
Notes:
4. The A0 Address bit is used to access address or data registers in I/O-mapped or memory-mapped applications.
5. The CM Clock Multiplier pin should be tied HIGH for a 12-MHz clock source and tied to ground for a 48-MHz clock source. In SL11H, this pin was designated
as an ALE input pin.
6. V
DD
can be derived from the USB supply. The diagram below shows a simple method to provide 3.3V/30 mA. Another option is to use a Torex Semiconductor,
Ltd. 3.3V SMD regulator (part number XC62HR3302MR).
7. The X1/X2 clock requires external 12- or 48-MHz matching crystal or clock source.
Table 6-1. SL811HS Pin Assignments and Definitions
Pin No. Pin Type Pin Name Pin Description
1 IN A0 A0 = 0. Selects Address Pointer. Reg. Write Only. Selects Data Buffer or Register.
R/W.
[4]
2 IN nDACK DMA Acknowledge. An active LOW input used to interface to an external DMA
controller. This works only in slave mode. In host mode, pin should be tied to Logic 1
in Host Mode.
3 OUT nDRQ DMA Request. An active LOW output used with an external DMA controller. nDRQ and
nDACK form the handshake for DMA data transfers. In host mode, pin must be left
unconnected in Host Mode.
4 IN nRD Read Strobe Input. An active LOW input used with nCS to Read registers/data memory.
5 IN nWR Write Strobe Input. An active LOW input used with nCS to Write to registers/data
memory.
6 IN nCS Active LOW Chip Select. Used with nRD and nWD when accessing SL811HS.
7 IN CM Clock Mode. Select Internal 4 X Clock Multiplier. 1 enables 4X clock multiplier. 0
Disables.
[5]
8 VDD1 +3.3 VDC Power for USB Transceivers
9 BIDIR DATA + USB Differential Data Signal HIGH Side
10 BIDIR DATA - USB Differential Data Signal LOW Side
11 GND USB GND Ground Connection for USB
12 VDD +3.3 VDC SL811HS Device V
DD
Power
[6]
13 IN CLK/X1 12-/48-MHz Clock or External Crystal X1 Connection
[7]
14 OUT X2 External Crystal X2 Connection
15 IN nRST SL811HS Device Active LOW Reset Input
16 OUT INTRQ Active HIGH Interrupt Request Output to External Controller
17 GND GND SL811HS Device Ground
18 BIDIR D0 Data 0. Microprocessor Data/(Address) Bus
19 BIDIR D1 Data 1. Microprocessor Data/(Address) Bus
20 BIDIR D2 Data 2. Microprocessor Data/(Address) Bus
21 BIDIR D3 Data 3. Microprocessor Data/(Address) Bus
22 GND GND SL811HS Device Ground
23 BIDIR D4 Data 4. Microprocessor Data/(Address) Bus
24 BIDIR D5 Data 5. Microprocessor Data/(Address) Bus
25 BIDIR D6 Data 6. Microprocessor Data/(Address) Bus
26 BIDIR D7 Data 7. Microprocessor Data/(Address) Bus
27 IN M/S Master/Slave Select. Host = 0, Slave = 1
28 VDD +3.3 VDC SL811HS Device V
DD
Power
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