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CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
EZ-USB AT2LP™ USB 2.0 to
ATA/ATAPI Bridge
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document 001-05809 Rev. *B Revised June 03, 2009
Features
Fixed Function Mass Storage Device—Requires no Firmware
Two Power Modes: Self Powered and USB Bus Powered to
enable Bus Powered CF Readers and Truly Portable USB Hard
Drives
Certified Compliant for USB 2.0 (TID# 40490119), the USB
Mass Storage Class, and the USB Mass Storage Class
Bulk-Only Transport (BOT) Specification
Operates at High Speed (480 Mbps) or Full Speed (12 Mbps)
USB
Complies with ATA/ATAPI-6 Specification
Supports 48-bit Addressing for Large Hard Drives
Supports ATA Security Features
Supports any ATA Command with the ATACB Function
Supports Mode Page 5 for BIOS Boot Support
Supports ATAPI Serial Number VPD Page Retrieval for Digital
Rights Management (DRM) Compatibility
Supports PIO Modes 0, 3, and 4, Multiword DMA Mode 2, and
UDMA Modes 2, 3, and 4
Uses one small External Serial EEPROM for Storage of USB
Descriptors and Device Configuration Data
ATA Interface IRQ Signal Support
Supports one or two ATA/ATAPI Devices
Supports Compact Flash and one ATA/ATAPI Device
Supports Board-level Manufacturing Test using the USB I/F
Can Place the ATA Interface in High Impedance (Hi-Z) to enable
Sharing of the ATA Bus with another Controller such as an
IEEE-1394 to ATA Bridge Chip or MP3 Decoder)
Low Power 3.3V Operation
Fully Compatible with Native USB Mass Storage Class Drivers
Cypress Mass Storage Class Drivers available for Windows
(98SE, ME, 2000, XP) and Mac OS X operating systems
Features (CY7C68320C/CY7C68321C only)
Supports HID Interface or Custom GPIOs to enable features
such as Single Button Backup, Power Off, LED-based Notifi-
cation, and so on
56-Pin QFN and 100-Pin TQFP Pb-free Packages
CY7C68321C is Ideal for Battery Powered Designs
CY7C68320C is Ideal for Self and Bus Powered Designs
Features (CY7C68300C/CY7C68301C only)
Pin Compatible with CY7C68300A (using Backward
Compatibility Mode)
56-Pin SSOP and 56-Pin QFN Pb-free Packages
CY7C68301C is Ideal for Battery Powered Designs
CY7C68300C is Ideal for Self and Bus Powered Designs
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Shrnutí obsahu

Strany 1 - ATA/ATAPI Bridge

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CEZ-USB AT2LP™ USB 2.0 toATA/ATAPI BridgeCypress Semiconductor Corporation • 198 Champion Court • San Jose

Strany 2

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 10 of 4228 N/A N/A NC No connect.29 15 22 SCL O Active for several ms at

Strany 3

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 11 of 426364N/A N/A NC NC No connect.65 N/A N/A GND GND Ground.66 32 39 V

Strany 4

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 12 of 42Additional Pin DescriptionsThe following sections provide additio

Strany 5

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 13 of 42SYSIRQThe SYSIRQ pin provides a way for systems to request servic

Strany 6

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 14 of 42DRVPWRVLDWhen this pin is enabled with bit 0 of configuration add

Strany 7

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 15 of 42RESET#Asserting RESET# for 10 ms resets the entire AT2LP. Inself-

Strany 8

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 16 of 42 Table 6. ATACB Field DescriptionsByte Field Name Field Descript

Strany 9

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 17 of 423 bmATACBRegisterSelect This field controls which of the taskfile

Strany 10 - CY7C68320C, CY7C68321C

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 18 of 42Operating Modes The different modes of operation and EEPROM infor

Strany 11

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 19 of 42Fused Memory DataWhen no EEPROM is detected at startup, the AT2LP

Strany 12

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 2 of 42ApplicationsThe CY7C68300C/301C and CY7C68320C/321A implementa USB

Strany 13

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 20 of 42MfgCBThe mfg_load and mfg_read vendor-specific commands arepassed

Strany 14

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 21 of 42EEPROM OrganizationThe contents of the recommended 256-byte (2048

Strany 15

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 22 of 42Table 11. Configuration Data Organization ByteAddressConfigurati

Strany 16

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 23 of 42SRST Enable Bit 1Determines if the AT2LP is to do an SRST reset d

Strany 17

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 24 of 420x08 BUTTON_MODE Bit 7Button mode (100-pin package only). Sets AT

Strany 18

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 25 of 420x09 ReservedGeneral Purpose I/O Pin Output EnableBits 7:6Reserve

Strany 19

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 26 of 42Search ATA on VBUS Bit 0Search for ATA devices when VBUS returns.

Strany 20

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 27 of 420x29 bMaxPacketSize0 USB packet size supported for default pipe

Strany 21

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 28 of 420x44 bInterval High speed interval for polling (maximum NAK rate)

Strany 22

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 29 of 420x66 Usage_Page Vendor defined 0x060x67 0xA00x68 0xFF0x69 Usage V

Strany 23

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 3 of 42The ATA/ATAPI port of the AT2LP is connected to one or twomass sto

Strany 24

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 30 of 420x8C bNumEndpoints Number of endpoints used by this interface (ex

Strany 25

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 31 of 420xA7 bString Unicode character LSB ’C’ 0x430xA8 bString Unicode c

Strany 26

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 32 of 42USB String Descriptor–Product0xD1 bLength String descriptor lengt

Strany 27

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 33 of 42Note: More than 0X100 bytes of configuration are shown for exampl

Strany 28

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 34 of 42Programming the EEPROMThere are three methods of programming the

Strany 29

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 35 of 42Absolute Maximum RatingsExceeding maximum ratings may impair the

Strany 30

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 36 of 42AC Electrical CharacteristicsATA Timing CharacteristicsThe ATA in

Strany 31

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 37 of 42Package DiagramsFigure 12. 100-Pin Thin Plastic Quad Flatpack (1

Strany 32

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 38 of 42Figure 13. 56-Pin Shrunk Small Outline Package 056Package Diagra

Strany 33

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 39 of 42Figure 15. 56-Pin QFN (8 X 8 X 0.9 MM) - SawnFigure 14. 56-Pin

Strany 34

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 4 of 42Pin DiagramsThe AT2LP is available in different package types to m

Strany 35

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 40 of 42General PCB Layout Recommendations for USB Mass Storage DesignsTh

Strany 36

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 41 of 42Figure 17 is a plot of solder mask pattern and Figure 18 displays

Strany 37

Document 001-05809 Rev. *B Revised June 03, 2009 Page 42 of 42Purchase of I2C components from Cypress or one of its sublicensed Associated Companies c

Strany 38

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 5 of 42Figure 3. 56-Pin QFN Pinout (CY7C68300C/CY7C68301C)NOTE: Italic l

Strany 39

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 6 of 42Figure 4. 56-Pin SSOP Pinout (CY7C68320C/CY7C68321C)5678910111213

Strany 40

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 7 of 42Figure 5. 56-Pin QFN Pinout (CY7C68320C/CY7C68321C)GNDVCCGPIO2 G

Strany 41

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 8 of 42Figure 6. 100-Pin TQFP Pinout (CY7C68320C/CY7C68321C only)1009998

Strany 42

CY7C68300C, CY7C68301CCY7C68320C, CY7C68321CDocument 001-05809 Rev. *B Page 9 of 42Pin DescriptionsThe following table lists the pinouts for the 56-p

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