Cypress Semiconductor CY7C1383D Uživatelský manuál stáhnout pdf (Strana 25)

CY7C1381D

CY7C1383D

Document #: 38-05544 Rev. *C Page 25 of 29

ZZ Mode Timing

[29, 30]

Timing Diagrams (continued)

SUPPLY

CLK

ZZREC

LL INPUTS

(except ZZ)

DON’T CARE

DDZZ

ZZI

RZZI

Outputs (Q)

High-Z

DESELECT or READ Only

Ordering Information

Speed

(MHz) Ordering Code

Package

Name Part and Package Type

Operating

Range

133 CY7C1381D-133AXC

CY7C1383D-133AXC

A101 Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

3 Chip Enables

Commercial

CY7C1381D-133AXI A101 Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

3 Chip Enables

Industrial

100 CY7C1381D-100AXC

CY7C1383D-100AXC

A101 Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

3 Chip Enables

Commercial

CY7C1383D-100AXI Industrial

Notes:

29.Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

30.DQs are in high-Z when exiting ZZ sleep mode.

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Cypress Semiconductor CY7C1383D Uživatelský manuál Strana 25