Cypress Semiconductor STK14C88-5 Uživatelský manuál Strana 6

  • Stažení
  • Přidat do mých příruček
  • Tisk
  • Strana
    / 18
  • Tabulka s obsahem
  • KNIHY
  • Hodnocené. / 5. Na základě hodnocení zákazníků
Zobrazit stránku 5
STK14C88-5
Document Number: 001-51038 Rev. *B Page 6 of 18
Data Protection
The STK14C88-5 protects data from corruption during
low-voltage conditions by inhibiting all externally initiated
STORE and WRITE operations. The low-voltage condition is
detected when V
CC
is less than V
SWITCH
. If the STK14C88-5 is
in a WRITE mode (both CE
and WE are low) at power up after a
RECALL or after a STORE, the WRITE is inhibited until a
negative transition on CE or WE is detected. This protects
against inadvertent writes during power up or brown out
conditions.
Noise Considerations
The STK14C88-5 is a high-speed memory. It must have a high
frequency bypass capacitor of approximately 0.1 µF connected
between V
CC
and V
SS,
using leads and traces that are as short
as possible. As with all high-speed CMOS ICs, careful routing of
power, ground, and signals reduce circuit noise.
Hardware Protect
The STK14C88-5 offers hardware protection against inadvertent
STORE operation and SRAM WRITEs during low-voltage
conditions. When V
CAP
<V
SWITCH
, all externally initiated STORE
operations and SRAM WRITEs are inhibited. AutoStore can be
completely disabled by tying V
CC
to ground and applying + 5 V
to V
CAP
. This is the AutoStore Inhibit mode; in this mode,
STOREs are only initiated by explicit request using either the
software sequence or the HSB
pin.
Low Average Active Power
CMOS technology provides the STK14C88-5 the benefit of
drawing significantly less current when it is cycled at times longer
than 50 ns. Figure 5 and Figure 6 shows the relationship
between I
CC
and READ or WRITE cycle time. Worst case current
consumption is shown for both CMOS and TTL input levels
(commercial temperature range, V
CC
= 5.5 V, 100% duty cycle
on chip enable). Only standby current is drawn when the chip is
disabled. The overall average current drawn by the STK14C88-5
depends on the following items:
The duty cycle of chip enable
The overall cycle rate for accesses
The ratio of READs to WRITEs
CMOS versus TTL input levels
The operating temperature
The V
CC
level
I/O loading
Preventing Store
The STORE function is disabled by holding HSB high with a
driver capable of sourcing 30 mA at a V
OH
of at least 2.2 V,
because it has to overpower the internal pull-down device. This
device drives HSB LOW for 20 s at the onset of a STORE.
When the STK14C88-5 is connected for AutoStore operation
(system V
CC
connected to V
CC
and a 68 F capacitor on V
CAP
)
and V
CC
crosses V
SWITCH
on the way down, the STK14C88-5
attempts to pull HSB
LOW. If HSB does not actually get below
V
IL
, the part stops trying to pull HSB LOW and abort the STORE
attempt.
Figure 5. Current Versus Cycle Time (READ)
Figure 6. Current Versus Cycle Time (WRITE)
Zobrazit stránku 5
1 2 3 4 5 6 7 8 9 10 11 ... 17 18

Komentáře k této Příručce

Žádné komentáře