Cypress Semiconductor CY7C68301C Uživatelský manuál stáhnout pdf (Strana 12)

CY7C68300C, CY7C68301C

CY7C68320C, CY7C68321C

Document Number: 001-05809 Rev. *K Page 12 of 44

95 49 56 DD12 I/O

[8]

High Z ATA data bit 12.

96 50 1 DD13 I/O

[8]

High Z ATA data bit 13.

97 51 2 DD14 I/O

[8]

High Z ATA data bit 14.

98 52 3 DD15 I/O

[8]

High Z ATA data bit 15.

99 53 4 GND GND Ground.

100

[9]

5 ATAPUEN

(NC)

I/O Bus powered ATA pull up voltage source (see ATAPUEN on

page 15).

Alternate function: General purpose input when the

EEPROM configuration byte 8 has bit 7 set to ‘1’. The input

value is reported through EP1IN (byte 0, bit 2).

Table 1. AT2LP Pin Descriptions (continued)

Note Italic pin names denote pin functionality during CY7C68300A compatibility mode

100

TQFP

QFN

SSOP

Pin Name

Type

Default State

at Startup

Pin Description

Notes

8. If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See VBUS_ATA_ENABLE on page 15.

9. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C.

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 43 44

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Cypress Semiconductor CY7C68301C Uživatelský manuál Strana 12