Cypress Semiconductor CY7C1511V18 Uživatelský manuál stáhnout pdf (Strana 3)

CY7C1511V18, CY7C1526V18

CY7C1513V18, CY7C1515V18

Document Number: 38-05363 Rev. *F Page 3 of 32

Logic Block Diagram (CY7C1513V18)

Logic Block Diagram (CY7C1515V18)

CLK

(19:0)

Gen.

Control

Logic

Address

[17:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Control

Logic

Address

Reg.

BWS

[1:0]

REF

Write Add. Decode

Write

Reg

(19:0)

DOFF

[17:0]

Write

Reg

Write

Reg

Write

Reg

1M x 18 Array

512K x 36 Array

CLK

(18:0)

Gen.

Control

Logic

Address

[35:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Control

Logic

Address

Reg.

144

BWS

[3:0]

REF

Write Add. Decode

Write

Reg

(18:0)

512K x 36 Array

DOFF

[35:0]

Write

Reg

Write

Reg

Write

Reg

[+] Feedback

1 2 3 4 5 6 7 8 ... 31 32

72-Mbit QDR™-II SRAM 4-Word 1
Burst Architecture 1
Application Example 10
Truth Table 10
CY7C1511V18, CY7C1526V18 11
CY7C1513V18, CY7C1515V18 11
[+] Feedback 17
Power Up Sequence 20
DLL Constraints 20
Operating Range 21
Capacitance 23
Thermal Resistance 23
Switching Waveforms 26
Package Diagram 30

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