Cypress Semiconductor CY7C1380C Uživatelský manuál stáhnout pdf (Strana 19)

PRELIMINARY

CY7C1380C

CY7C1382C

Document #: 38-05237 Rev. *B Page 19 of 28

CHZ

Clock to High-Z

[16]

2.6 2.8 3.0 3.4 3.4 ns

CLZ

Clock to Low-Z

[16]

1.0 1.0 1.3 1.3 1.3 ns

EOHZ

OE HIGH to Output High-Z

[16, 17]

2.6 2.8 3.0 3.4 4.0 ns

EOLZ

OE LOW to Output Low-Z

[16, 17]

0 0 0 0 0 ns

EOV

OE LOW to Output Valid

[16]

2.6 2.8 3.0 3.4 4.2 ns

Switching Characteristics Over the Operating Range

[15, 16, 17]

Parameter Description

-250 -225 -200 -167 -133

UnitMin. Max. Min. Max. Min. Max. Min. Max. Min. Max.

Switching Waveforms

Write Cycle Timing

[4, 18, 19, 20]

Notes:

18. WE

is the combination of BWE and BWx to define a write cycle (see Write Cycle Descriptions table).

19. WDx stands for Write Data to Address X.

20. Device originally deselected.

ADSP

CLK

ADSC

ADV

ADD

Data In

CYC

ADS

ADH

ADS

ADH

ADVS

ADVH

WD1

WD2

WD3

CES

CEH

CES

CEH

CES

CEH

Single Write

Burst Write

Unselected

ADSP

ignored with CE

inactive

masks ADSP

= DON’T CARE

= UNDEFINED

Pipelined Write

High-Z

Unselected with CE

ADV Must Be Inactive for ADSP Write

ADSC initiated write

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 27 28

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