Cypress Semiconductor Perform CY7C1380D Specifikace stáhnout pdf (Strana 11)

Chapter 2: Designing the System 2–5

Design Strategy

Preliminary

f The implementation of the video pipeline and the touch screen controller are

described in more detail in AN527: Implementing an LCD Controller and in Nios II 3C25

Microprocessor with LCD Controller Data Sheet.

Table 2–1. Standard Hardware Components to Implement the Digital Picture Viewer Requirements

Design Requirement Design Strategy Components Needed

Display JPEG pictures on the LCD Display 1. LCD screen controller

2. A video pipeline to send video data to

the LCD screen

1. PIO

2. Video pipeline peripherals

Scroll through JPEG pictures 1. An interrupt to capture touch screen

events

2. Touch screen control

1. PIO

2. SPI

Frame buffering 1. Need a large memory. Use the on-board

DDR SDRAM

2. Transfer video data from memory to

Video pipeline

1. DDR SDRAM Controller

2. SGDMA

Store JPEG images, application software,

and reset vectors in a non-volatile

memory

Use the on-board flash memory Flash Controller

Store program code, stack, and exception

vectors

Use the on-board SSRAM SSRAM Controller

Generate interrupts and measure system

performance

Need a timer Interval Timer

DOwnload, run, and debug software JTAG UART communication interfaces JTAG UART

Keep track of hardware and software

builds

Ensure software is only run on the

hardware for which it was compiled

System ID peripheral

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 45 46

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Cypress Semiconductor Perform CY7C1380D Specifikace Strana 11